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How hall technology might be developed in packaged semiconductor monolithic integrated circuits

Allegro MicroSystems, LLC is really a world leader in developing, manufacturing, and marketing high-performance Hall-effect sensor integrated circuits. This note provides a basic knowledge of the Hall effect and just how Allegro designs and implements Hall technology in packaged semiconductor monolithic integrated circuits.

Hall Effect Principles

The Hall effect is known as after Edwin Hall, who in 1879 learned that a voltage potential develops across a present carrying conductive plate when a magnetic field passes through home plate inside a direction perpendicular to the plane from the plate, as illustrated within the lower panel of figure 1.

The fundamental physical principle behind the Hall effect is the Lorentz force, which is illustrated within the upper panel of figure 1. When an electron moves along a direction, v, perpendicular towards the applied magnetic field, B, it experiences a force, F, the Lorentz force, that's normal to both the applied field and the current flow.

In reaction to this force, the electrons move in a curved path across the conductor along with a net charge, and for that reason a voltage, develops across the plate. This Hall voltage, VH, obeys the formula below, which implies that VH is proportional to the applied field strength, which the polarity of VH is determined by the direction, either north or south, from the applied magnetic field. With this property, the Hall effect is employed as a magnetic sensor.


VH is the Hall voltage over the conductive plate,

I is the current passing through the plate,

q may be the magnitude from the charge of the charge carriers, ρn may be the quantity of charge carriers per unit volume,

and t may be the thickness of the plate.

Allegro semiconductor integrated circuits integrate a Hall element, as the Hall effect applies to both conductive plates and semiconductor plates. Using the Hall effect inside a fully integrated monolithic IC you'll be able to measure magnetic field strength and make up a wide array of Hall-effect integrated circuits for many different applications.

An Allegro Hall switch is activated with a positive magnetic field that's generated by a south pole. A positive field will turn on the output transistor and fasten the output to GND, serving as an energetic low device.

The field required to activate the unit and turn on the output transistor is known as the magnetic operating point, and is abbreviated BOP. When the field is removed the output transistor is turned off. The area necessary to switch off the unit once it's activated is known as the magnetic release point, or BRP. The main difference between BOP and BRP is called the hysteresis and is accustomed to prevent switching bounce due to noise.

Allegro also makes magnetic latches and linear devices. Magnetic latches turn on having a south pole (BOP) and switch off having a north pole (BRP). Requiring a north pole to deactivate the latch separates latches from simple switches. As they do not turn off once the field is removed, they “latch” the output in our state before the opposite field is applied. Latches are used for sensing rotating magnets for motor commutation or speed sensing.

Linear devices have an analog output and therefore are used for linear position sensing in linear encoders for example automotive throttle pedal position sensors. They have a ratiometric output voltage that is nominally VCC / 2 when no field is used. In the existence of a south pole the output will relocate the direction of VCC as well as in the existence of a north pole the output will move in the direction of GND. Allegro has a broad range of Hall switches, latches and linear devices ideal for a multitude of applications.

Please reference the Allegro product selection guide at: http://www.allegromicro.com/en/Products/Categories/Sensors

Employing the Hall Effect

Allegro Hall-effect integrated circuits (IC) employ the Hall effect by a Hall element along with other circuitry, for example opamps and comparators, to make magnetically activated switches and analog output devices. An easy Hall switch, such as the open NMOS device shown in figure 2, can be used to determine whether a magnet exists or absent, and responds having a digital output.

Integrated circuits are electronic structures using a large number of circuit elements in high density, thought to be a single unit. The circuit elements include active components for example transistors and diodes, in addition to passive components such as resistors, capacitors, and inductors. These elements are interconnected by metal, usually aluminum, to make in the more complicated op-amps and comparators of the device. The Hall switch in figure 2 is used for any simple illustration, however these components are employed on all Allegro devices for the most complex ICs. The Hall element in figure 2 is shown because the square box using the “X.” Its output is amplified, fed right into a comparator, and then for an open NMOS digital output. Allegro also makes Hall ICs with two Hall elements for sensing differential magnetic fields as well as three Hall elements for direction detection of moving ferromagnetic targets. However complex the sensor topology, the constituents are all manufactured in and on the top of the thin substrate of a semiconductor material.

Hall IC Structure

Allegro products are manufactured on silicon substrates, by doping into the silicon with various materials to produce n-type (electron) or p-type (electron hole) carrier regions. These n-type and p-type material regions are formed into geometries that comprise the active and passive aspects of the integrated circuit, such as the Hall element, and are connected together by depositing metal within the geometries. In this way the active and passive components are electrically connected together. Since the geometries required are very small, within the selection of microns or even smaller, the circuit density is incredibly high, allowing complex circuits on a very small area of silicon.

The fact that all the active and passive elements are grown within the substrate, or deposited around the silicon, makes them inseparable in the silicon, and truly identifies them as monolithic integrated circuits. Figure 3 shows how a Hall element is integrated into the Allegro IC. It's just an area of doped silicon that creates an n-type plate that will conduct current.

As mentioned earlier, when a current needs in one corner from the plate to the opposite corner, a Hall voltage will develop over the other two corners of the plate when in the presence of a perpendicular magnetic field. The Hall voltage is going to be zero when no field is used. Similarly more complicated geometries make up active components for example NPN or NMOS transistor structures. Figure 4 shows cross-sections of both NPN and PMOS transistors.

For production efficiency, these circuits are grown in the substrate even though it is still in the form of a large wafer. The circuits are repeated in a pattern of rows and columns that can be sawn into individual die, or “chips,” as illustrated in figure 5.

A single Allegro Hall-effect sensor IC device are visible in figure 6. This is actually the simple switch with functional block diagram as shown in figure 2. All of the circuitry is roofed on the IC, including the Hall element which may be seen as the red square in the center of the chip, as well as the amplifier circuitry and protection diodes and also the numerous resistors and capacitors required to realize the unit functionality.

Hall Device Packaging

After sawing the silicon wafer rows and columns into individual die, the die are then packaged for individual sale. A completed package, one of many possible styles, is shown in figure 7. The die is seen inside the case, installed on a copper die pad. Contact to the copper leads is created through gold wire-bonding from metal pads on the die surface to the electrically isolated package leads. The package will be encapsulated, or overmolded, with plastic to protect the die from damage.

The package in figure 7 is the simple switch of figure 2 with VCC, GND, as well as an Output leads in a miniature 3-pin single inline package (SIP). Other packages can be seen in figure 8 and include a wafer-level chip scale package (CSP), an SOT23W, an MLP, a 3-pin UA-package SIP, and a 4-pin K-package SIP.