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Industry's First Dual 70 A SilentMOS and Single 140 A good Power Stage

Introduction towards the LTC7050 SilentMOS Family

This article introduces the Analog Devices LTC7050 SilentMOS family. This new high current point of load converters satisfies the growing need for high efficiency, high density, and reliable power stage for system designs.

Why the Analog Devices LTC7050 SilentMOS Family Is the Ideal Choice

The LTC7050 can be configured to power two separate rails, with individual on/ off control, fault reporting, and current sensing outputs, or it can be configured as a dual-phase single output converter. The LTC7051 single 140 A power stage leverages the LTC7050 core design and offers even higher power density having a single inductor.

The LTC7050 dual monolithic power stage fully integrates high-speed drivers with low resistance half-bridge power switches plus comprehensive monitoring and protection circuitry in an electrically and thermally optimized package. Having a suitable high-frequency controller, this power stage forms a concise, high current voltage regulator system with state-of-the-art efficiency and transient response. Silent Switcher(R) 2 architecture and integrated bootstrapped supplies allow high-speed switching, decreasing high-frequency power loss by attenuating input supply or switch node voltage overshoot and minimizing attendant EMI.

Low Switch Node Stress Improves the Robustness of the Power Stage

In conventional buck regulator designs, the hot loop inductance between your input capacitor and power MOSFETs leads to large spikes at the switch node. Using Silent Switcher 2 technology, the SilentMOS LTC7050 integrates critical VIN decoupling capacitors inside the LQFN package. Shrinking the hot loops results in lower parasitic inductance. Additionally, the fully symmetrical layout cancels the electromagnetic fields. Figure 1 compares the LTC7050 layout having a conventional power stage. As shown in Figure 2, the peak voltage of the switch node is only 13 V once the input voltage is 12 V and output is fully loaded. The ample margin between peak voltage force on the ability MOSFET and it is voltage rating ensures the reliability of the unit. The fully integrated hot loops eliminate PCB layout sensitivity and make the sophisticated electromagnetic cancellation design transparent to the user. To correctly measure switch node ringing, use a coax cable soldered from the switching pin to its local ground and appraise the waveform with a matched impedance in the oscilloscope.

Figure 1. SilentMOS LTC7050 has internal symmetrical and small hot loops to reduce the ringing, with (a) showing LTC7050 and (b) showing a regular DrMOS module.

Figure 2. Switch node waveform; ILOAD = 25 A per phase.

High Efficiency and Advanced Package Enables High Power Density

Because of its low transition loss, the LTC7050 is more efficient compared to conventional DrMOS module in high-frequency designs. The overlapping duration of power device current and voltage is determined by the driving speed. Inside a multidie DrMOS module, driving speed is restricted by the inductance between drivers and power MOSFETs, as well as between drivers as well as their capacitors. Driving MOSFET gates too rapidly can lead to overvoltage in the gates of power devices/drivers and cause failure. Also, our prime di/dt will cause a large spike in the switch node since the hot loop inductance isn't negligible.

LTC7050's drivers are integrated on a single die because the power stage, and also the capacitors for those gate drivers are in package. With the bonding wires eliminated, the parasitic inductance in each driving loop approaches zero. Compared with a multidie DrMOS module, LTC7050 activates and from the power devices much faster. A typical rising fringe of switched node voltage is as short as 1 ns, as shown in Figure 2. Its best-in-class fast driving speed greatly cuts down on the transition loss. Fast driving speed permits the LTC7050 to have zero dead time, greatly reducing diode conduction and reverse recovery losses.

The sophisticated design enhances the power conversion efficiency at high switching frequencies. Figure 3 shows the 12 V to at least one.8 V conversion efficiency and loss curve at 600 kHz and 1 MHz. The peak efficiency has ended 94% for the 1 MHz design.

Figure 3. Efficiency and loss curves.

Figure 4 shows the 12 V to at least one.0 V conversion efficiency and loss curve at 600 kHz and 1 MHz.

Figure 4. Efficiency and loss curves.

For the fir MHz design shown in Figure 4, the efficiency at 60 A is nearly 90%, as the total power loss, such as the inductor loss, is less than 7 W. LTC7050's thermally enhanced 5 mm × 8 mm LQFN package has a low 10.8°C/W thermal impedance. Its low loss and low thermal impedance enable LTC7050 to replace two industry-standard 5 mm × 6 mm DrMOS modules. Figure 5 shows the thermal image of LTC7050 at 12 V to 1 V/60 A conversion switching at 1 MHz. The case temperature rise over temperature is about 68°C.

Figure 5. LTC7050.Thermal image of Test condition: VIN = 12 V, VOUT = 1 V, and IOUT = 60 A, no air flow, keep the board running for 30+ minutes.

Rigorous Fault Alert and Protection System Ensures the Safety from the Load

The LTC7050 family incorporates a range of fault detection, alert, and protection features to ensure the safety of the system.

LTC7050 has a fully tested overcurrent protection for top and bottom FETs. Matching devices on a single die as power devices extract the instantaneous current flowing with the power FETs. The monolithic architecture guarantees that temperature and process variation effects are very well canceled, with negligible parasitic effects causing a delay of current sensing signals. These intrinsic benefits of monolithic architecture realize real-time, precise current monitoring and protection. Once the overcurrent comparator is tripped, the affected power device is latched off regardless of the PWM input, the FLTB pin is pulled low to report the fault towards the controller, and also the opposite device is switched on to freewheel the inductor current to zero. The drivers only accept PWM signals again following the current ramps right down to zero. This protection scheme prevents the power stage from continuously chattering around the positive or negative current limit, averting thermal force on the devices. Figure 6 shows the result of ramping up load current before the positive overcurrent protection is invoked.

To be certain that the power devices stay inside their safe operating areas, LTC7050's input overvoltage lockout feature forces both power switches to prevent switching when the input voltage is past the OV threshold. When the power MOSFET is carrying large current once the OV is detected, then your current is freewheeled through the opposite power device as described above.

The LTC7050 family provides two temperature measurement interfaces to the controller (like LTC3884) or system monitor. The TDIODE pin connects to some PN junction diode to determine the IC junction temperature using VBE method or ΔVBE method. TMON is a dedicated pin to report the die temperature with an industry-standard 8 mV/°C slope. Unlike a typical DrMOS module, which combines analog temperature monitoring along with other fault alerts in a single pin, LTC7050 TMON is pulled to VCC only if the die temperatures are a minimum of 150°C; under other fault conditions, TMON will keep reporting the die temperature while the FLTB open-drain output is pulled low. The monolithic architecture allows TDIODE and TMON to closely reflect the ability devices' temperature. When multiple power stages operate in a high phase count system, the TMON pins can be linked to report the greatest temperature.

Integrating the bootstrap diode and bootstrap capacitor into the package eliminates the need for a lift pin, as well as the possibility of accidentally shorting the bootstrap driver. Internally, the bootstrap driver voltage is continuously monitored. If the voltage falls underneath the undervoltage threshold, then your top FET is turned off to avoid excessive conduction loss.

Figure 6. Overcurrent protection of the LTC7050.


LTC7050 SilentMOS monolithic high current smart power stages are a perfect solution for high-frequency reason for load applications. The symmetrically placed, integrated hot loops bring a number of advantages. Having fewer external components reduces external component count, shrinks the PCB footprint, and lowers bill of material costs. The reduced switch node ringing improves the reliability of the unit. Low switching related loss offers high efficiency at high switching frequency, permitting the use of small inductors and shrinking the size of the output capacitor since the closed-loop bandwidth is higher. Comprehensive monitoring and protection features protect expensive loads under various fault conditions.

Contributory Authors:

Tuan Nguyen, IC Design Engineer

Eric Gu, IC Design Engineer

Eugene Cheung, IC Design Engineer

Yingyi Yan, IC Design Engineer